In frequency modulation (FM) frequency locking techniques such as those described in the related application, a square law detector is used to measure the amount of amplitude modulation (AM) in an optical signal. For this purpose a double balanced mixer is used to extract a component of the detector signal at a particular frequency. The output of the mixer is nulled by servo loops to perform frequency locking. Any DC offset in the mixer will cause a corresponding closed loop frequency offset. For this reason very low DC offset is desirable. As described in the related application, FM frequency locking circuits may employ loop filters which include integrators. Any DC input offset in the first integrator of the loop filter will also cause a closed loop frequency offset. Hence, it is also desirable for a low offset mixer to have a "built-in" time integration for performing the function of the integrator in the loop filter in such frequency locking circuits. It is therefore desirable to provide a mixer having low DC offset as well as built-in time integration.